Turbo codes and low-density parity-check (LDPC) codes have gained increasing acceptance as error correction coding standards for communication systems, especially for wireless mobile communication systems. Both the turbo codes and the LDPC codes may be used to achieve near-capacity performance that may be desirable for use in communication channels with unavoidable noise or interference.
A turbo code may generally include two or more convolutional codes. A turbo code may be constructed by a turbo encoder having two conventional convolutional code encoders and several interleavers. The turbo code encoded information may be decoded by using an iterative decoding technique with a computational complexity that is comparable to what is needed for each convolutional code. However, decoding each convolutional code iteratively may cause delays and thus may increase latency of the underlying communication systems.
Unlike a turbo code, a LDPC code does not have a definite structure in general and may be specified by a sparse parity-check matrix, that is, a matrix with a relatively small number of ones. The LDPC code may also be regarded as a combination of multiple single-parity check (SPC) codes corresponding to rows of the sparse parity-check matrix. Accordingly, a LDPC decoder may be a combination of numerous relatively simple sub-decoders, one for each SPC code. The decoding process may be carried out by iteratively exchanging information between the sub-decoders, whose task includes providing information regarding each SPC code. For example, the decoding process may be performed by using a belief propagation (BP) algorithm, a sum-product algorithm (SPA), or a min-sum algorithm. However, the LDPC code is often designed based on a computer-generated pseudo-random parity-check matrix and thus does not possess a simple encoding structure. In certain circumstances, it may be impractical to use the LDPC in certain communication systems because of the complexity associated with the LDPC encoding structures.
Technologies have been developed to improve performance of turbo codes and LDPC codes. For example, Li et al., “Product accumulate codes: a class of codes with near-capacity performance and low decoding complexity,” IEEE Trans. Inform. Theory, vol. 50, pp. 31-46 (January, 2004), proposes product accumulate (PA) codes that are constructed based on a serial concatenation of an outer codeword that is a turbo-product or direct-product of SPC codes and an inner codeword of a convolutional code. Although such technologies reduce some computational complexity of the encoding and decoding processing, the computational load may still be high and thus may be undesirable for certain applications such as high speed wireless communication and/or high density storage applications. Also, the size of memory entries of interleavers for such technologies may be equal to the length of the information bits to be encoded, which may require a large amount of memory to be used during the encoding process. Such memory requirement may be impractical or undesirable in certain circumstances such as in portable communication devices.
Methods and systems consistent with certain features of the disclosed embodiments are directed to solving one or more of the problems set forth above.